Renesas Electronics has developed three system-on-chip (SoC) technologies for automotive multi-domain electronic control units (ECUs), targeting the requirements of software-defined vehicle (SDV) architectures. The technologies, presented at the International Solid-State Circuits Conference (ISSCC) 2026 in San Francisco, address functional safety, AI processing quality, and power efficiency in next-generation automotive SoCs.
The first technology introduces a chiplet architecture supporting ASIL D functional safety. By combining the standard UCIe die-to-die interface with a proprietary RegionID mechanism, the design prevents hardware resource interference across simultaneous applications, achieving freedom from interference (FFI). Testing confirmed a transmission speed of 51.2 GB/s across the UCIe interface, approaching intra-SoC transfer speed limits.
Pour en savoir plus : Renesas unveils SoC tech for next-gen automotive ECUs
